## 2020 Xiao-Bennett [Analog architectures for neural network acceleration based on non-volatile memory](https://aip.scitation.org/doi/pdf/10.1063/1.5143815)

![bb](https://knowen-production.s3.amazonaws.com/uploads/attachment/file/5287/industry.PNG 'b')

> Compared to the digital PIM accelerators discussed in Sec. III, **the resistive crossbar has a more favorable energy scaling.** Computing a VMM on a DRAM or SRAM array requires charging one row at a time and then one column at a time for each cell. By charging all the rows in parallel, the energy of a VMM scales as $N^2$, compared to $N^3$ for a digital memory array. **Resistive crossbars, particularly those based on ReRAM technology, can also potentially be denser than SRAM or DRAM arrays**, while being capable of **storing multiple bits of weight data per cell**. It is often the case in analog accelerators, however, that while the in-memory matrix computations are highly efficient, **the area and energy consumption is dominated not by the crossbar but by the peripheral circuitry**

![ii](https://knowen-production.s3.amazonaws.com/uploads/attachment/file/5288/isaac%2B-%2Bcortex.PNG 'i')

## ++ 2017 Marinella [Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a **ReRAM Analog Neural Training Accelerator**](https://arxiv.org/ftp/arxiv/papers/1707/1707.09952.pdf)

a talk [Accelerating Deep Learning with Analog Memory - **A Device, Circuit and Systems Approach**](https://adacenter.org/sites/default/files/publications/20190602_InMemoryComputingWorkshop_PritishNarayanan.pdf)